Werbung
A
X
3
S
-
U
/
A
X
3
S
P
A
X
3
S
-
U
/
A
X
3
S
P
CODEC (Coding and Decoding) .................................................................................................................................................. 99
DDR (Double Data Rated) SDRAM ............................................................................................................................................. 99
DIMM (Dual In Line Memory Module)........................................................................................................................................ 100
DMA (Direct Memory Access) .................................................................................................................................................... 100
ECC (Error Checking and Correction) ....................................................................................................................................... 100
EDO (Extended Data Output) Memory ...................................................................................................................................... 100
EEPROM (Electronic Erasable Programmable ROM)............................................................................................................. 101
EPROM (Erasable Programmable ROM).................................................................................................................................. 101
EV6 Bus......................................................................................................................................................................................... 101
FCC DoC (Declaration of Conformity)....................................................................................................................................... 101
FC-PGA (Flip Chip-Pin Grid Array)............................................................................................................................................ 102
Flash ROM .................................................................................................................................................................................... 102
FSB (Front Side Bus) Clock........................................................................................................................................................ 102
2
I
C Bus........................................................................................................................................................................................... 102
IEEE 1394 ..................................................................................................................................................................................... 103
Parity Bit ........................................................................................................................................................................................ 103
PBSRAM (Pipelined Burst SRAM) ............................................................................................................................................. 104
PC100 DIMM ................................................................................................................................................................................ 104
PC133 DIMM ................................................................................................................................................................................ 104
r
o
-
U
r
o
-
U
O
n
l
i
n
e
-
H
a
n
d
b
u
c
O
n
l
i
n
e
-
H
a
n
d
b
u
c
h
h
Werbung
