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Panel PC 300
Implementierungsanleitung
//
// MTCX command (target) device types.
//
#define MTCX_DEV_COMMON
#define MTCX_DEV_BASEBOARD
#define MTCX_DEV_SCANCODE
#define MTCX_DEV_PANEL
#define MTCX_DEV_PANELSET
//
// MTCX command device numbers.
//
#define MTCX_DEVNUM_FPGA
#define MTCX_DEVNUM_PX32
#define MTCX_DEVNUM_SCAN
#define MTCX_DEVNUM_SET
//
// MTCX command directions.
//
#define MTCX_DIR_READ
#define MTCX_DIR_WRITE
//
// MTCX command error codes (returned at MTCX_FAIL_COMMAND).
//
#define MTCX_ERR_NONE
#define MTCX_ERR_IRQ_COLLISION
#define MTCX_ERR_UNKNOWN_COMMAND
#define MTCX_ERR_TIMEOUT
#define MTCX_ERR_BAD_PARAMETER
#define MTCX_ERR_DEVICE_BUSY
#define MTCX_ERR_DEVICE_FAILURE
//
// MTCX register definitions.
//
typedef struct
{
unsigned long Minor
unsigned long Major
unsigned long Reserve
} MTCX_VERSION_REG;
typedef struct
{
unsigned char Addr
unsigned char Reserve :1;
unsigned char Irq
} MTCX_COM_PARA_BYTE;
typedef struct
{
MTCX_COM_PARA_BYTE Com[2];
unsigned long Reserve :16;
} MTCX_CONFIG_COM_REG;
typedef struct
{
unsigned long Reserve1
unsigned long PanelCount
unsigned long Reserve2
} MTCX_CONFIG_SPECIALS_REG;
typedef struct
{
unsigned long Addr
Copyright © B&R - Änderungen vorbehalten
PPC300_Implementierungsanleitung_V1_02.doc
0x00
0x01
0x02
0x03
0x04
0x00
// MTCX FPGA
0x01
// MTCX PX32
0x02
// Scan codes (key configuration)
0x03
// Settings
1
// data read command
0
// data write command
0x00
0x80
0x81
0x82
0x83
0x84
0x85
:8;
:4;
:20;
:3; // 000b = Disabled,
// 001b = 238h, 010b = 2E8h, 011b = 2F8h,
// 101b = 338h, 110b = 3E8h, 111b = 3F8h
:4; // IRQ: 0011b = IRQ3, 0100b = IRQ4, 1010b = IRQ10, 1011b = IRQ11
// Com[0] = COMC (extern), Com[1] = COMD (Touch)
:12;
:1;
// 0 = 16 panels, 1 = 1 panel
:19;
:14;
// Address/Size depending on command; Flash address / 16
Codebeispiele
100b = 328h,
02.11.09
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