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12. Signal flow and processing
The table below depicts the audio signal flow for a D Series Tesira device.
1
Tesira
freewire DSP
processing
hosted by
Tesira
servers
1 The Tesira system is a free wire DSP environment where processing features can be designed and distributed
among servers. System IO is designed and managed, and all signal processing is defined, at the server level.
D Series Tesira amplifiers are added as high power outputs to the system with audio transported to them via
the AVB network, through analog connection, or both.
2 AVB is a distributed network of one or more Ethernet AVB-enabled switches that carry both networked audio
and control.
3 Mute block in the Tesira output section
4 Level block in the Tesira output section
5 Invert block in the Tesira output section
6 Amplifier gain - Digitally implemented for exact control and management of gain structure
7 ISVPL/RPM - Inter-sample Voltage Peak Limiter is a digitally implemented voltage peak limiter with assignable
profiles. Rational Power Management configuration enables flexible power sharing of the total available power
across the amplifier channels.
8 Load monitoring - Impedance sweeps and LoadPilot monitoring
D Series Tesira Amplifier
3
4
Mute
Level
2
Mute
Level
AVB
Network
Mute
Level
Mute
Level
Tesira
Environment
5
6
7
8
Load
Invert
AmpGain
RPM/ISVPL
Monitoring
Load
Invert
AmpGain
RPM/ISVPL
Monitoring
Load
Invert
AmpGain
RPM/ISVPL
Monitoring
Load
Invert
AmpGain
RPM/ISVPL
Monitoring
Amplifier
Platform
D SERIES Tesira Quick Start Guide rev 2.0.0
12. Signal flow and processing
25
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