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Seite 20
6.3.2.
Bit-Details im Interconnect Space
a) Class ID
≙ Communication Board (Class Nr.)
4
H
≙ synchronous (Subclass Nr.)
2
H
b) Interc. Template Flag
≙ H/W extension not present or not supported
0
H
c) Reset Status
≙ register not supported
0
H
d) Program Table Index
≙ Monitor Index Flag (MIF): normal operation
0
H
≙ Override Index Flag (OIF): normal operation
0
H
≙ Override Index: not used
0
H
≙ Sequence Index: no offset in program table
0
H
e) NMI Enable
≙ On-Board Error Enable (OBEE): disable general NMI source
0
H
≙ Power Fail Enable (PFE): disable power fail NMI source
0
H
≙ Software NMI Source Enable (SSE): disable software NMI source
0
H
≙ Debugger Entry Enable (DEE): disable debugger NMI source
0
H
≙ Diagnostic Request Enable (DRE): disable diagnostic NMI source
0
H
f) General Control
≙ Local Reset (LR): not active
0
H
≙ Software NMI Source (SS): no software interrupt pending
0
H
≙ Debugger Entry (DE): no debugger interrupt pending
0
H
≙ Diagnostic Request (DR): no diagnostic request pending
0
H
g) PSB Memory Control
≙ Memory Write Disable (MWD): write operation permitted
0
H
≙ Memory Disable (MD): Memory enabled
0
H
≙
1 Bit
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