POST Code Description
10
DMA channel 1 test
11
DMA page registers test
12 - 13
Reserved
14
Test 8254 timer 0 Counter 2.
15
Test 8259 interrupt mask bits for channel 1
16
Test 8259 interrupt mask bits for channel 2
17
Reserved
19
Test 8259 functionality
1A - 1D
Reserved
1E
lf EISA NVM checksum is good, execute ElSA initialization (EISA BIOS only)
1F - 29
Reserved
30
Detect Base Memory & Extended Memory Size
31
1. Test Base Memory from 256K to 640K
2. Test Extended Memory from 1 M to the top of memory
32
1. Display the Award Plug & Play BIOS Extension message (PnP BIOS only)
2. Program all onboard super I/O chips (if any) including COM ports, LPT
ports, FDD port... according to setup value
33 - 3B
Reserved
3C
Set flag to allow users to enter CMOS Setup Utility
3D
1. lnitialize Keyboard
2. lnstall PS2 mouse
3E
Try to turn on Level 2 cache
Note: Some chipset may need to turn an the L2 cache in this stage. But usually,
the cache is turn on later In POST 61h
3F - 40
Reserved
BF
1. Program the rest of the Chipset Value according to Setup. (Later Setup Value
Program)
2. If auto-configuration is enabled, programmed the chipset with predefined
values in the MODBINable Auto-Table
41
Initialize floppy disk drive controller
42
Initialize Hard drive controller
43
If it is a PnP BIOS, initialize serial & parallel ports
44
Reserved
45
Initialize math coprocessor.
46 - 4D
Reserved
4E
If there is any error detected (such as video, kb. ), show all the error messages
on the screen & wait for user to press <F1> key
4F
1. If password is needed, ask for password
2. Clear the Energy Star Logo (Green BIOS only)
50
Write all CMOS values currently in the BIOS stack area back into the CMOS
51
Reserved
©2003 DSM Computer AG, München
Stand: November 2003
POST - CODE
96M2831o-2
Seite: 35