Chipsatz - Asus A8V-E Deluxe Handbuch

4.4.2 4.4.2

Chipsatz

Chipsatz
4.4.2 4.4.2 4.4.2 Chipsatz Chipsatz Chipsatz
Advanced
DRAM Configuration
Upstream LDT Bus Width
Downstream LDT Bus Width
LDT Bus Frequency
VLink Mode Selection
PEG Data Scrambling
PE0-PE3 Data Scrambling
Init Display First
Chipset Vcore Adjustment
↑↓ : Select Item ↑↓ ↑↓ ↑↓ ↑↓
F1:Help
→← →← →←: Select Menu →← →←
ESC: Exit
DRAM-Konfiguration DRAM-Konfiguration DRAM-Konfiguration
DRAM-Konfiguration DRAM-Konfiguration
Die Werte in diesem Untermenü zeigen die vom BIOS automatisch
erkannten DRAM-bezogenen Informationen an.
Advanced
Current DRAM Frequency
Max Memclock (MHz)
CAS# latency (Tcl)
RAS# to CAS# delay
Min RAS# active time(Tras)
Row precharge Time
Master ECC Enable
↑↓ ↑↓ ↑↓ : Select Item ↑↓ ↑↓
F1:Help
→←: Select Menu →← →← →← →←
ESC: Exit
Current DRAM Frequency
Hier wird der Transfer-Modus angezeigt. Dieses Element ist nicht
konfigurierbar.
Max Memclock (MHz) [Auto]
Hier können Sie den maximalen Betriebstakt des Arbeitsspeichers
einstellen.
Konfigurationsoptionen: [Auto] [DDR200] [DDR266] [DDR333]
[DDR400]
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Phoenix-Award BIOS CMOS Setup Utility
Chipset
[16 bit]
[16 bit]
[Auto]
[By Auto]
[Auto]
[Enable]
[PCI Slot
[+1.6 V]
-/+: Change Value
Enter: Select Sub-menu
Phoenix-Award BIOS CMOS Setup Utility
DRAM Configuration
166 MHz
[Auto]
[Auto]
(Trcd) [Auto]
[Auto]
(Trp) [Auto]
[Enabled]
-/+: Change Value
Enter: Select Sub-menu
Select Menu
Item Specific Help
DRAM timing and
control
F5: Setup Defaults
F10: Save and Exit
Select Menu
Item Specific Help
Place an artificial
memory clock limit on
the system. Memory is
prevented from
running faster than
this frequency.
F5: Setup Defaults
F10: Save and Exit
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