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Lake People EUCG V51 Mk II Bedienungsanleitung Seite 6

Universal clock generator

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THE SYNC INPUTS
The sync inputs are situated on the 64-pin con-
nector. They accept AES/EBU (sync)-signals
respectively WCLK signals.
The AES-sync input is attached to pins 4 a+c
respectively pins 17 a+c of the multipin connec-
tor. Ground should be connected to pins 3/5
a+c or 18 a+c.
Inside DIGI-RACK 503/04/06 this input is most-
ly wired to an XLR socket.
The balanced AES/EBU sync input meets AES
3(11)recommendations. It is transformer balan-
ced, impedance 110 ohms.
The input sensitivity is < 200mV.
The valid clock range is 28 ... 210 kHz.
The wordclock input is attached to pins 2 a+c
respectively pin 16 a of the multipin connector.
Ground should be connected to pins 1 a+c or
18 a+c.
Inside DIGIRACK 503/04/06 this input is mostly
wired to a BNC connector.
Input impedance is selectable to 75 ohms or 10
kohms by means of an internal jumper.
Ex works the impedance is set to 75 ohms.
The input sensitivity is < 200 mV.
The valid clock range is 28 ... 210 kHz.
SELECTING A SYNC SOURCE
The button to select the sync source is found on
the front panel and marked with SELECT. Pus-
hing the button will activate in a cyclic manor:
- Internal Clock 32 kHz:
The INT LED, the LOCK LED and the LEDs
44.1 and 48 kHz are lit.
- Internal Clock 44.1 kHz:
The INT LED, the LOCK LED and the 44.1
kHz LEDare lit.
- Internal Clock 48 kHz:
The INT LED, the LOCK LED and the 48
kHz LED are lit.
- (Internal Clock 96 kHz):
The INT LED, the LOCK LED and the 96
kHz LED are lit.
- (Internal Clock 192 kHz):
The INT LED, the LOCK LED and the LEDs
48 and 96 kHz are lit.
- Wordclock-Sync Input:
The WCLK LED is lit.
When a valid clock was detected, this is
shown by the LOCK LED. Furthermore the
dedicated LEDs of the sample-rate display
will show the input´s clock rate, as far as the
computed input frequency is within a range
of +/- 200 Hz around the common frequen-
cies.
Unvalid clocks will be displayed by the ER-
ROR LED.
- AES-Sync Input:
The AES LED is lit.
When a valid clock was detected, this is
shown by the LOCK LED. Furthermore the
dedicated LEDs of the sample-rate display
will show the input´s clock rate, as far as the
computed input frequency is within a range
of +/- 200 Hz around the common frequen-
cies.
Unvalid clocks will be displayed by the ER-
ROR LED.
HINT:
The internal clocks 96 and 192 kHz may be ac-
tivated / deactivated by means of DIP-switches
3 and 4 on the PCB.
SPECIAL FUNCTIONS
AUTO MODE
The Auto-Mode serves to enhance the operati-
onal reliability by bypassing the loss of an exter-
nal sync signal with a similar internal oscillator
frequency.
Auto-Mode is activated/decativated by means
of DIP-switch 1 on the PCB. The activated state
is displayed by the AUTO LED on the front pan-
el.
When Auto-Mode is engaged, a droped exter-
nal sync signal from the AES-Sync or the
WCLK input will be replaced by a similar inter-
nally generated oscillator frequeny. This is dis-
played by a flashing sync-source LED on the
frontpanel.
As soon as the active external sync is present
again, the unit will switch over and the dedica-
ted source LED is lit constantly.
- 6 -

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