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Lake People ADC C74 Bedienungsanleitung Seite 7

24 bit analog-digital converter
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HOW IT ALL WORKS....
PREFACE
The ADC C74 in all available versions offers
high-end technology.
By choosing the suitable version to meet his
specific requirements, the customer will take
advantage of an excellent price/performance ra-
tio.
Even the basic model is measurably and au-
dibly better than the middle-of-the-road 16-bit
converters usually found in DAT machines,
harddisk recorders or digital multitrack systems
- even when the digital signals are truncated to
16 bits inside the recording medium.
Much more important than stating the conver-
ters' available bit width is the maximum achie-
vable dynamic range.
We at LAKE PEOPLE consider this parameter
as much more significant and honest than the -
barely theoretic - available output bit width.
For those who want to know in detail:
Bitresolution = dynamic range / 6
This formula leads to an in-fact resolution of
about 17.5 bit for the standard 105 dB version
and 19.2 bit for the enhanced 115 dB version.
There is still to be mentioned, that all our mea-
surements are taken from 20 Hz to 20 kHz with
an A-wtd filter like everbody else does.
Assuming an "RMS unweighted" or "CCIR 2K"
measurement, performance would decrease by
up to 10 dB !
THE FUNCTION
The analog input signals are first buffered, then
their level can be adjusted to the converter's in-
put sensitivity by two pots.
The analog front-end had been carefully desig-
ned to achieve a dynamic range of >126 dB,
enough for coming converter generations.
The unit's core is, of course, the A-to-D conver-
ter chip. It is designed for 1-bit delta/sigma con-
version at 64...128 times oversampling. Left
and right channel are processed by one and the
same chip.
The incorporated digital filter provides high atte-
nuation of undesirable alias frequencies. The
conversion process is not influenced by the in-
put signal's level or frequency.
The digital output word is available as a serial
signal in two's complement.
For its task, the A-to-D converter requires a
number of clock signals. These are derived ei-
ther from an internal crystal oscillator or from an
external WCLK signal, pre-processed by the in-
ternal PLL circuitry.
Coming from the converter chip, the digital sig-
nal is translated into a form corresponding to
AES/EBU resp. S/P-DIF standard by a further
integrated circuit. After this, it is available at the
corresponding digital outputs on the rear panel.
7

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