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Lake People EDAC V56 AES Bedienungsanleitung Seite 6

24 bit digital analog converter
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THE ANALOG OUTPUTS
The EDAC V56's electronically balanced analog
line outputs are connected to pins 2a+c and
4a+c on the multipin terminal. The left channel
is connected to pins 2 a+c (in-phase is c), the
right channel is connected to pins 4 a+c (in-
phase is c).
Corresponding shielding ground is availlable at
pins 1 / 3 / 5 a+c.
The analog inputs' sensitivity can be adjusted
by means of the trimpots accessible on the front
panel. The adjustment range stretches from
about +2 .... +22 dBu for digital full scale.
HINT:
when unbalanced sources should be connec-
ted, the inverting input (pin 2a / 4a) must be tied
to ground.
HOW IT ALL WORKS....
PREAMBLE
The EDAC V56 offers high-end technology in all
available versions. It is from its data and audibly
better than a standard 16-bit converter, like
usually found in DAT machines, hard disk re-
cording systems or digital multitracks.
For sure, you have already noticed that we do
not offer our units clearly as "24-bit'' converters.
We rather prefer to praise the achievable dyna-
mic range, which tells much more about the ac-
tual performance than the barely theroretical
output bit width.
For those who want to know in detail:
resolution (in bit) = dynamic range / 6
This results in an actual resolution of 17.5 bit for
the 105 dB version and 19.2 bit for the 115 dB
version.
We'd like to state that these measurements are
taken A-wtd from 20 Hz ... 20 kHz, like everbo-
dy else does.
Using RMS unwtd or CCIR laws, these values
would decrease by several dBs!
FUNCTION
From the input, the digital input signals are pas-
sed to the D/A section's receiver circuit, special-
ly designed for this kind of signals.
The receiver circuit prepares the signals for
being processed by the following stages.
It scans the incoming data at 64-times over-
sampling and evaluates the status bits within
the data words (pro/con, emphasis and error).
Furthermore, it extracts the sampling rate infor-
mation to compute some clocks which are rele-
vant for internal digital processing speed.
The receiver is followed by the D/A converter. It
combines a digital filter, the two-channel con-
verter circuitry and the analog output filters on
one single chip.
The converter is distinguished by high dynamic
range, exellent distortion and a fine sound.
It offers a 24 bit wide input and a digital interpo-
lation filter, followed by a delta/sigma modulator
at 64...128-times oversampling. Theoretically
the converter is able to work with 1 kHz sample
rate.
As soon as the emphasis flag is received with
the data word, the on-chip digital deemphasis
circuit is activated.
It is adjusted to a sample-rate of 44.1 kHz. Em-
phasis signal with different sample rates will ha-
ve more or less level deviations at high frequen-
cies.
The converter is followed by two-pole filters in
conventional design, optimized in their phase
response.
After the filter section and the output level ad-
justment, the analog signals are fed to the ba-
lanced output terminals.
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