Open AX4L Handbuch Seite 6
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BIOS (Basic Input/Output System) ................................................................................................................................ 96
Bus Master IDE (DMA-Modus) ...................................................................................................................................... 97
CNR (Communication and Networking Riser)................................................................................................................ 97
CODEC (Coding and Decoding) .................................................................................................................................... 97
DDR (Double Data Rated) SDRAM ............................................................................................................................... 98
DIMM (Dual In Line Memory Module) ............................................................................................................................ 98
DMA (Direct Memory Access)........................................................................................................................................ 98
ECC (Error Checking and Correction) ........................................................................................................................... 98
EDO (Extended Data Output) Memory .......................................................................................................................... 99
EEPROM (Electronic Erasable Programmable ROM).................................................................................................... 99
EPROM (Erasable Programmable ROM)....................................................................................................................... 99
EV6 Bus ........................................................................................................................................................................ 99
FCC DoC (Declaration of Conformity) ......................................................................................................................... 100
FC-PGA (Flip Chip-Pin Grid Array) .............................................................................................................................. 100
Flash ROM .................................................................................................................................................................. 100
FSB (Front Side Bus) Clock ........................................................................................................................................ 100
2
C Bus ........................................................................................................................................................................ 101
IEEE 1394 ................................................................................................................................................................... 101
Parity Bit ..................................................................................................................................................................... 101
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