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Grundig GDR 5550 HDD Betriebsanleitung Seite 32

Inhaltsverzeichnis

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Hauptplatte – Video-AD-Wandler / Main Board – Video AD Converter
Pb/B_IN
Pb/B_IN
F_C_IN
F_CVBS _IN
Y/G _IN
Y/G _IN
F_Y_IN
CVBS _IN
Pr/R_IN
Pr/R_IN
18
TV_CVBS _IN
R_C_IN
*
R_Y_IN
J10
BK 1608 HM121-T
FB113
F_C_IN
1
BK 1608 HM121-T
2
FB114
F_Y_IN
3
BK 1608 HM121-T
4
FB115
F_CVBS _IN
5
6
AUDIO_L
7
AUDIO_L
8
AUDIO_R
9
AUDIO_R
9 HEA DER 2.0MM CAB LE WIRE
FRO M FRO NT AV IN BOARD
GND
V33
V33
CA32
C383
C384
C385
C386
+
C122
47 UF/10V
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
GND
FB5
FBMJ2125 HS420 -T
CA38
C399
CA33
C387
+
+
100 UF/10V
0.1UF
0.1UF
100 UF/10V
V33_ VIA
V18_ VIA
C36 7
0.47 UF
R39 3 75
C36 8
0.47 UF
R39 4 75
C36 9
0.47 UF
R39 6 75
C37 0
0.47 UF
R39 8 75
C37 1
0.47 UF
R39 9 75
C37 2
0.47 UF
R40 0 75
C37 3
0.47 UF
R40 1 75
C37 4
0.47 UF
R40 2 75
C37 5
0.47 UF
R40 3 75
C37 6
0.47 UF
R40 5 150
GND_VIN
Copy
VBI
CVBS/Y/G
Protection
Data
Detector
Slicer
Analog Front End
VI_1_A
Composite and S-Video Processor
CVBS/
VI_1_B
ADC1
Pb/B/C
Y/C
VI_1_C
CVBS/Y
Y
Luma
Separation
Processing
YCbCr
5-line
VI_2_A
C
C
Chroma
Adaptive
CVBS/
Processing
VI_2_B
ADC2
Y/G
Comb
VI_2_C
M
U
VI_3_A
X
Y/G
Component
CVBS/
ADC3
VI_3_B
Processor
Pr/R/C
VI_3_C
Pb/B
YCbCr
Color
Gain/Offset
Space
Pr/R
Conversion
CVBS/Y
VI_4_A
ADC4
Sampling
Clock
Timing Processor
Host
with Sync Detector
Interface
V33_ VIA
C388
C389
C390
C391
0.1UF
0.1UF
0.1UF
0.1UF
GND_VIN
C365
C366
33 PF
33 PF
GND
±30 PPM
R17 0
2.2K
Y4
R39 2
2.2K
14 .31818 MHz
R391
100K
U38
1
VI_1_B
C_6 /G PIO/R ED
2
VI_1_C
C_7 /G PIO/GR EEN
3
CH1_ A33 GND
C_8 /G PIO/ BLUE
4
CH1_ A33 VDD
C_9 /G PIO/ FSO
5
CH2_ A33 VDD
6
CH2_ A33 GND
7
VI_2_A
8
VI_2_B
9
VI_2_C
10
CH2_ A18 GND
11
CH2_ A18 VDD
12
A18 VDD _REF
13
A18 GND_REF
14
CH3_ A18 VDD
15
CH3_ A18 GND
16
VI_3_A
17
VI_3_B
18
VI_3_C
19
CH3_ A33 GND
20
CH3_ A33 VDD
TVP 5146
R52 7
2.2K
R404
33
GND_VIN
GND
R406
DNS-33
TVP5146
R407
100
Y[9:0]
C409
C[9:0]
Output
0.1UF
Formatter
FSS
GND
GPIO
V18
FB3
V18_ VI
FBMJ2125 HS420 -T
CA54
CA19
C378
C379
+
C402
+
100 UF/10V
0.1UF
0.1UF
10 UF/10V
0.1UF
GND
FB6
FBMJ2125 HS420 -T
+
GND
V18_ VID
V33
60
59
58
57
56
VI_0
R54 5
DG ND
VI_1
R54 6
55
DVDD
54
Y_0
RP41 33 /RP
53
Y_1
VI_2
52
1
Y_2
51
VI_3
2
Y_3
50
VI_4
3
Y_4
49
VI_5
4
IOG ND
48
IOVDD
47
RP42 33 /RP
Y_5
46
VI_6
1
Y_6
45
VI_7
2
Y_7
44
VI_8
3
Y_8
43
VI_9
4
Y_9
42
DG ND
41
DVDD
TQFP-80
30
GND
VI_CLK0
VI_CLK0
VI_FSS
(Fast switch input source between RGB and CVBS/YC)
VI_FSS
(/RST _VI)
E5_ GPIOx31
(INT_ VI)
E5_ GPIO1
10
SDA
SDA
SCL
SCL
9
R410
4.7K
GND_VIN
GND
GND
V18_ VID
C380
C381
C382
0.1UF
0.1UF
0.1UF
GND
V18_ VIA
CA34
C392
C393
C394
C395
C396
C397
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
100 UF/10V
GND_VIN
VI_GPIO_C0
(To SC ART)
(SW2)
VI_GPIO_C2
(AFT_ DET)
VI_GPIO_C3
VI_GPIO_C4
(RESE RVE)
VI_GPIO_C5
(To SC ART)
(To SC ART)
VI_GPIO_C6
(To SC ART)
VI_GPIO_C7
(To SC ART)
VI_GPIO_C8
(To SC ART)
VI_GPIO_C9
VI_D[9..0]
33
VI_D0
33
VI_D1
VI_D2
8
7
VI_D3
6
VI_D4
5
VI_D5
8
VI_D6
7
VI_D7
6
VI_D8
5
VI_D9
31
9
0
º
C398
0.1UF

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Diese Anleitung auch für:

Gmk4500

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